USB 3.2 Gen2/Gen1 PHY IP in TSMC(5nm, 6nm, 7nm,12nm/16nm, 22nm, 28nm, 40nm, 55nm)
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Retention Alternative Regulator, combines high efficiency in normal mode and ultra-low quiescent current for sleep mode
RAR-eSR-qLR-ref-[1.62-3.63]-[0.55-2.5].04, as any Power Management Virtual Component designed by Dolphin Design, is readily retargetable toward any submicron CMOS process.
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Block Diagram of the Retention Alternative Regulator, combines high efficiency in normal mode and ultra-low quiescent current for sleep mode
