MIPI C-PHY v1.2 D-PHY v2.1 TX 3 trios/4 Lanes in TSMC (16nm, N7, N5A)
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Real Time Image Rectification for HD pictures up to 1920x1080p60Hz
The IV-Rect IP implements picture rectification for high resolution images like HD (1280x720p60 or 1920x1080p30). The maximum resolution is 2048x2048.
The throughput of the design is 1 pixel per cycle on 3 components 8bit each (e.g. RGB or YUV444). The rectification process requires 1 frame delay through external SDRAM/DDR. The picture content can be interlaced or progressive video.
Programmable parameters are:
input picture size
output picture size
number of video components
distortion coefficients
rotation matrix
translation matrix
camera matrix
The throughput of the design is 1 pixel per cycle on 3 components 8bit each (e.g. RGB or YUV444). The rectification process requires 1 frame delay through external SDRAM/DDR. The picture content can be interlaced or progressive video.
Programmable parameters are:
input picture size
output picture size
number of video components
distortion coefficients
rotation matrix
translation matrix
camera matrix
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