MIPI C-PHY v1.2 D-PHY v2.1 TX 3 trios/4 Lanes in TSMC (16nm, N7, N5A)
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RDMA RoCE v2 FPGA IP
The Grovf RDMA IP core and host drivers provide RDMA over Converged Ethernet (RoCE v2) system implementation and integration with standard Verbs API.
RDMA IP is delivered with reference design which includes the IP subsystem itself the 100G MAC IP subsystem, DMA subsystem, host drivers, and example application on software. The system drivers are integrated with OFED standard Verbs API and are compatible with well-known RNIC cards and software. The system provides low latency FPGA implementation of RoCE v2 at 100 Gbps throughput.
RDMA IP is delivered with reference design which includes the IP subsystem itself the 100G MAC IP subsystem, DMA subsystem, host drivers, and example application on software. The system drivers are integrated with OFED standard Verbs API and are compatible with well-known RNIC cards and software. The system provides low latency FPGA implementation of RoCE v2 at 100 Gbps throughput.
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