The quadrature former block is intended to generate quadrature signal in frequency range 25-1750MHz with phase correction ±4.The quadrature former core is based on frequency division by 4, implemented on CMOS logic. The block input frequency range 100-7000MHz. The phase correction block uses the dependence of the fronts rise rate of the supply voltage, that in turn affects the phase of the output quadrature signal. The buffers located at the output of the quadrature former, in addition to the output power amplifying, also serve as a junction between the core (frequency divider) and the external blocks.