MIPI C-PHY v1.2 D-PHY v2.1 TX 3 trios/4 Lanes in TSMC (16nm, N7, N5A)
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QDMA Subsystem for PCI Express
The Xilinx® LogiCORE™ QDMA for PCI Express® (PCIe) implements a high performance, configurable Scatter Gather DMA for use with the PCI Express Integrated Block. The IP provides an optional AXI4-MM or AXI4-Stream user interface.
The QDMA solution provides support for multiple Physical/ Virtual Functions with scalable queues, and is ideal for applications that require small packet performance at low latency.
The QDMA solution is available for early access beta customers in 2018.1 (April, 2018).
The QDMA solution provides support for multiple Physical/ Virtual Functions with scalable queues, and is ideal for applications that require small packet performance at low latency.
The QDMA solution is available for early access beta customers in 2018.1 (April, 2018).
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