MIPI D-PHY Universal IP - 4.5Gbps/lane, MIPI D-PHY v2.5 Compliant in TSMC 22ULP
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Power on Reset IP, Input: 3.3V, Vrr=2.81V, Vfr=2.81V, UMC 55nm SP process
Vrr=2.81V Vfr=2.81V, input VCCK=1.0V VCC3IO=3.3V, 3.3V Power On Reset,special request, UMC 55nm SP/RVT LowK Logic Process
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