You are here:
Power on Reset IP, Input: 3.3V, UMC 0.35um process
Vrr=2.5V Vfr=2.3V, VCC=3.3V, Ivcc=18uA, Power On Reset, UMC 0.35um Logic process.
查看 Power on Reset IP, Input: 3.3V, UMC 0.35um process 详细介绍：
- 查看 Power on Reset IP, Input: 3.3V, UMC 0.35um process 完整数据手册
- 联系 Power on Reset IP, Input: 3.3V, UMC 0.35um process 供应商
Power IP IP
- Multi-Protocol Crypto Packet Engine, Low Power, Bus Attached
- Low-Latency SerDes PMA - 10GbE, 25GbE
- NPU IP family for generative and classic AI with highest power efficiency, scalable and future proof
- PCIe Gen 6 SERDES IP - supports up to 112G LR ethernet with low power and latency
- 56G Serdes in 7nm bundled with PCie Gen 5 controller IP
- Complete USB Type-C Power Delivery PHY, RTL, and Software