DMA AXI4-Stream to/from AXI4 Memory Map - Scatter-Gather Descriptor List
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Power Management IC - MIPI I3C Basic Interface IP
Power Management IC (PMIC) is designed for DDR5 RDIMM, DDR5 LRDIMM, DDR5 NVDIMM application. PMIC is used for switching and LDO regulators. PMIC-I3C Interface used to select suitable power fit for various application environment. PMIC device is intended to operate up to 12.5MHz.
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Block Diagram of the Power Management IC - MIPI I3C Basic Interface IP
PMIC IP
- Input 3V-3.6V, VBG=1.23V BandGap; UMC 0.35um CDMOS Process
- 8V ~ 25V HV driver, UMC 0.35um 3.3V/5V/40V CDMOS logic process
- Power Management Unit(5-sets DC-DC, 2-sets REG, PowerSwitch, and Li-ion Charger) for Audio Platform; UMC 0.35um 3.3V/5V CDMOS process
- 110nm BCD process Synchronous High-Density Single-Port SRAM Compiler
- UMC 0.11um BCD process;Single-Port SRAM compiler
- UMC 0.11um BCD High Voltage Process Synchronous Via1 Programmable ROM Compiler