The LDS NVME HOST RECORDER IP has been done for beginners and expert in NVMe to drive NVMe PCIe SSD.
The register file interface simplify the management of the IP for CPU interface or for State Machine interface using APB bus:
When using a PCIe RP IP configured in Gen2 the PCIe frequency is at 125MHz.
When using a PCIe RP IP configured in Gen3 the PCIe frequency is at 250MHz.
The source code format is available for ease of customization. The customization can be done by Logic Design Solutions and DO254 documentation is available on request.
This IP can be customized according to specific needs (application-specific requirement). Any other pre-designed functions can be integrated into the FPGA. FPGA density and I/O requirements can be defined according to customer specification.