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PLL ECL phase-frequency detector with ECL charge pump
Phase-frequency detector (PFD) forms control signal for VCO tuning. PFD compares phases of divided VCO signal and divided reference oscillator signal and detects phase difference. Charge pump generates pulses for loop filter. The CP output stage is an amplifier equalizing a buffer reference voltage of CP output current adjustment with a loop filter voltage; and an amplifier minimizing the disbalance of the charging/discharge current in loop filter capacitors. Reference frequency 0.32…10 MHz. Output current is 43.5...155.5 uA.
The block is fabricated on iHP SiGe BiCMOS 0.25 um (SGB25V) technology.
The block is fabricated on iHP SiGe BiCMOS 0.25 um (SGB25V) technology.
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Phase-Frequency Detector IP
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- 24.84 MHz Phase-frequency detector with charge pump
- 0.32 to 10 MHz Phase-frequency detector
- PLL CMOS phase-frequency detector with ECL charge pump
- PLL ECL phase-frequency detector with ECL charge pump