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PLBV4.6 Master Burst
The PLBV46 Master Burst is a continuation of the Xilinx family of IBM CoreConnect compatible LogiCORE™ products. It provides a bi-directional interface between a User IP core and the PLB v4.6 bus standard. This version of the PLBV46 Master Burst has been designed for PLBV46 Master operations consisting of single data beat read or write transfers and Fixed Length Burst Transfers of 2 to 16 data beats.
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Embedded IP
- RT-640 Embedded Hardware Security Module (HSM) for Automotive ASIL-B
- RT-645 Embedded Hardware Security Module (HSM) for Automotive ASIL-D
- Secure-IC Securyzr™ Tunable Cryptography solutions with embedded side-channel protections: AES - SHA2 - SHA3 - PKC - RSA - ECC - ML-KEM - ML-DSA - XMSS - LMS - SM2 - SM3 - SM4 - Whirlpool - CHACHA20 - Poly1305
- Post-Quantum Cryptography - xQlave® PQC ML-KEM (Kyber)
- 32-bit Embedded RISC-V Functional Safety Processor
- The SST SuperFlash® IP is an embedded CMOS Flash memory IP with sector/chip Erase and byte Program capability.