MIPI D-PHY Universal IP - 4.5Gbps/lane, MIPI D-PHY v2.5 Compliant in TSMC 22ULP
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Phase-frequency detector in CMOS logic
The phase-frequency detector (PFD) consists of a signal level converter from differential reduced swing ECL to single-ended full swing CMOS signal and two D-flip-flops with reset, made in CMOS logic. Multiplexer allows to switch the input signals to the corresponding inputs.
The block is fabricated on AMS BiCMOS 0.35 um technology.
The block is fabricated on AMS BiCMOS 0.35 um technology.
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Phase-frequency detector in CMOS logic IP
- PLL CMOS phase-frequency detector with ECL charge pump
- PLL CMOS phase-frequency detector with CMOS charge pump
- Phase-frequency detector in ECL logic
- 24.84 MHz phase-frequency detector with charge pump
- 24.84 MHz Phase-frequency detector with charge pump
- Small footprint, low power, Power on Reset for Silterra CL180G