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Peripheral Direct Memory Access Controller
The CC-PDMA-APB-AHB is a synthesisable Verilog model of a peripheral direct memory access controller. The PDMA core can be efficiently implemented on FPGA and ASIC technologies.
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Block Diagram of the Peripheral Direct Memory Access Controller
DMA IP
- PCIe 5.0 Controller with AMBA AXI interface
- PCIe 4.0 Controller with AMBA AXI interface
- AMBA Parameter Configurable Multi-Channel DMA Controller (typically 1 to 256)
- AHB Multi-Channel DMA Controller
- DMA AXI4-Stream to/from AXI4 Memory Map - Scatter-Gather Descriptor List
- DMA AXI4-Stream to/from AXI4 Memory Map - Scatter-Gather Command Stream List