MIPI M-PHY G4 Type 1 2Tx2RX in TSMC (16nm, 12nm, N7, N6, N5, N4, N3A, N3E)
PCIe 7.0 Controller
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PCIe 7.0 IP
- PCIe 7.0 PHY IP supporting the latest features of the evolving PCIe 7.0 specification to enable 128 GT/s and up to x16 lane configurations
- PCIe 7.0 PHY in TSMC (N5, N3P, N2P)
- PCIe 7.0 Controller with AXI
- PCIe 7.0 Retimer Controller
- PCIe 7.0 Switch
- PCIe 7.0 Controller (can be configured to support EP, RP, DM, or SW applications)