MIPI C-PHY v1.2 D-PHY v2.1 TX 3 trios/4 Lanes in TSMC (16nm, N7, N5A)
Parallel FIR Filter
The Parallel FIR Filter core can perform filtering with zero latency and is well suited for real-time applications. The core supports two modes of computation/filtering: single-cycle and multi-cycle. In single-cycle, filtering is done in one clock cycle and in multi-cycle, filtering is accomplished in multiple clock cycles.
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Block Diagram of the Parallel FIR Filter
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