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珠海创飞芯一次可编程知识产权核,高可靠性低功耗,自主研发,拥有发明专利, 创飞芯提供多种工艺:0.18/0.16/0.13/0.11um和90/65/55/40/22nm
Chuangfeixin (CFX)'s OTP IP is adopted in different generations of logic and HV technology (0.18/0.16/0.13/0.11 um and 90/65/55/40/28 nm). The required voltage for OTP bit cell programming can be supplied from internal charge pump or external VPP pin. The bit cell is programmed by applying a high-voltage pulse across the gate and substrate of the thin oxide transistor to break down the oxide between gate and substrate. Before programming, a blank OTP array comes with all bits reading as "0". After programming, an OTP bit cell will to be read as "1".
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OTP IP
- NVM OTP in GlobalFoundries (65nm, 55nm, 40nm, 28nm, 22nm)
- 64X1 Bits OTP (One-Time Programmable) IP, GF22nm FDX 0.8V/1.8
- 4K x 8 Bits OTP (One-Time Programmable) IP, GF22nm FDX 0.8V/1.8
- Embedded OTP (One-Time Programmable) IP, 1.8V/5V BCD
- 1x64 Bits OTP (One-Time Programmable) IP, GlobalFoundries 22nm FDX 0.8V/1.8V
- 256x1 Bits OTP (One-Time Programmable) IP, TSMC 0.18μm 1.8V/3.3V Mixed-Signal, General Purpose II