MIPI D-PHY Universal IP - 4.5Gbps/lane, MIPI D-PHY v2.5 Compliant in TSMC 22ULP
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OTP One Time Programmable IP SMIC 28HV
Chuangfeixin (CFX)'s OTP IP is adopted in different generations of logic and HV technology (0.18/0.16/0.13/0.11 um and 90/65/55/40/28 nm). The required voltage for OTP bit cell programming can be supplied from internal charge pump or external VPP pin. The bit cell is programmed by applying a high-voltage pulse across the gate and substrate of the thin oxide transistor to break down the oxide between gate and substrate. Before programming, a blank OTP array comes with all bits reading as "0". After programming, an OTP bit cell will to be read as "1".our otp iP covers from 180nm all the way to 22nm; CFX also supports embedded Nor flash and embedded Nand Flash IP as well for strategic customers
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OTP IP
- 512x8 Bits OTP (One-Time Programmable) IP, TSMC 12FFC 0.8V/1.8V Process
- NVM OTP in Fujitsu (90nm, 65nm, 55nm, 40nm)
- NVM OTP in Dongbu (180nm, 150nm, 110nm)
- NVM OTP in SMIC (110nm, 65nm, 55nm, 40nm)
- NVM OTP in TSMC (180nm, 152nm, 130nm, 110nm, 90nm, 65nm, 55nm, 40nm, 28nm, 22nm, 16nm, 12nm, N7, N6, N5, N4P)
- NVM OTP in UMC (180nm, 153nm, 110nm, 90nm, 80nm, 55nm, 40nm, 28nm, 22nm)