Upgraded PUF-based Crypto Coprocessor (Compliant with TLS 1.3 / FIPS 186-5)
You are here:
Oscillator IP, Output: 5KHz, UMC 55nm SP process
Output frequency 5KHz. Input 0.9V-1.1V, Oscillator, UMC 55nm SP/RVT Low-K Logic process.
查看 Oscillator IP, Output: 5KHz, UMC 55nm SP process 详细介绍:
- 查看 Oscillator IP, Output: 5KHz, UMC 55nm SP process 完整数据手册
- 联系 Oscillator IP, Output: 5KHz, UMC 55nm SP process 供应商
Clock IP IP
- TSMC CLN7FF 7nm Clock Generator PLL - 800MHz-4000MHz
- Aeonic Generate Clock Generation Module [PLL], 8x smaller than fractional analog solutions
- TSMC CLN20SOC 20nm Clock Generator PLL - 700MHz-3500MHz
- Extended MIPI CSI2 Serial Video Receiver, 64 bits, 8 data lanes, 4 pixels/clock
- MEMS-based Clock Generator with On-chip Temperature Compensation
- IEEE1588 & IEEE802.1AS PTP Ordinary Clock (OC) core