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Open source version of the UltraSPARC T2 processor
OpenSPARC T2 is derived from the UltraSPARC T2 processor. The UltraSPARC T2 processor is industry´s first "server on a chip", packaging the most cores and threads of any general-purpose processor available, and integrating all the key functions of a server on a single chip: computing, networking, security, and input/output (I/O), plus tight integration with the Solaris operating system.
By making the source for this design available for a larger community to review and learn from, we expect that ideas around chip multi-threading and multi-core concepts can be explored more freely and openly, and that truly beneficial innovations can be achieved.
By making the source for this design available for a larger community to review and learn from, we expect that ideas around chip multi-threading and multi-core concepts can be explored more freely and openly, and that truly beneficial innovations can be achieved.
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64-bit CMT Microprocessor IP
- 64-bit RISC-V Single Core Microprocessor
- 64-bit High performance Single Core Microprocessor
- 64-bit High performance Dual Core Microprocessor
- 64-bit High performance Quad Core RISC-V Microprocessor
- 64-Bit 8-stage superscalar processor that supports RISC-V specification, including GCN
- 64-bit 8-stage superscalar processor that supports RISC-V specification, including GCNP and Linux