You are here:
One Port Register File Compiler IP, UMC 40nm LP process
UMC 40nm LP One Port Register File with Sleep/Retention/Nap mode & peripheral LVT feature.
查看 One Port Register File Compiler IP, UMC 40nm LP process 详细介绍:
- 查看 One Port Register File Compiler IP, UMC 40nm LP process 完整数据手册
- 联系 One Port Register File Compiler IP, UMC 40nm LP process 供应商