LEE Flash G2 (G2) is an innovative Flash IP offering unique features that no other Flash IP could offer.
It is based on LEE Flash G1, which consists of simple SONOS memory cell, sandwiched by switch transistors on the side.
While maintaining the additional cost at minimum, it requires no high voltage for read operation, no isolation area in-between Memory cells and logic circuits, therefore super low power and easy to layout.
G2’s very special VDD operation architecture enables seamless connection of G2 Flash cell to standard logic circuit. Chip designer now can use non-volatize logic circuit, such as SRAM and open up new possibilities for innovation.
It is cost effective Flash solution for larger memory capacity requirement up to several Mega Bytes.
It also allows user to use standard CMOS process platform as is, utilizing existing PDK and Spice model because the implementation of G2 into the platform does not change any characteristics and geometries of it.
- Direct connection with logic circuit, to non-volatilize existing volatile logic circuits.
- No high voltage for Read operation, eliminating isolation to increase flexibility in layout.
- Supports high temperature and long retention life time for severe automotive requirement.
- Low power in Program/Erase operation for power critical applications.
- Short Test and Bake time to reduce chip cost.
- Requires fewest (4~5) additional masks.
- No change to SPICE model of Standard CMOS process, for re-using legacy design and IP.
- Logic Compatibility
- Since no high voltage for program and erase is applied to diffusion layer, all readout circuits are composed of standard core transistors.
- It realizes good compatibility with peripheral logic circuits and it becomes possible to mix G2 with logic circuits such as Non Volatile SRAM.
- High Speed by VDD operation
- Read circuit composed by core transistors realizes high speed access characteristic.
- Large Memory Capacity
- Small cell and peripheral circuit composed by core transistors make the IP small size and large memory capacity.
- High Temperature Operation
- SONOS is the device which enables memory functionality trapping electrons in Silicon Nitride film, and the retention life is controlled by optimization of thickness and film properties of oxide and/or Silicon Nitride films. G2 satisfactory supports operation temperature up to 125°C and 20years of data retention life at 125°C.
- Large Programming Size enables Short Testing Time
- G2 also uses FN tunneling technology to achieve extremely low power in program and erase.
- It consumes 1/1,000,000 times current, compare to conventional technologies using hot carrier injection for program/erase operation.
- This also helps reducing testing time, which dominates large portion of the chip cost.
- Low cost
Block Diagram of the Next Generation Flash device enabling small size, low power and direct connection with digital circuit which opens up new possibiities