MIPI C-PHY v1.2 D-PHY v2.1 TX 3 trios/4 Lanes in TSMC (16nm, N7, N5A)
Multiport TSN Switch
TSN is constantly evolving and it is targeting different sectors, like Automotive, Broadcasting or Aerospace. Therefore, this flexibility and reconfiguration can be only achieved through reconfigurable logic like FPGAs, HDL IPs and embedded software.
Our Multiport Time Sensitive Networking (MTSN) Switch IP core is a flexible HDL code ready to generate TSN end-point or bridge implementations. This IP Core is provided with a rich set of Generic parameters in order to obtain the best functionalities resources trade-off. This configuration of the TSN IP Core can be done through the Vivado GUI.
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Time Sensitive Networking IP
- Time Sensitive Networking (TSN) Single Port End Node core
- Time Sensitive Networking (TSN) Switched End Node core
- Time Sensitive Networking (TSN) IIC(R) Plugfest Application core
- Time Sensitive Networking Switch
- 3/5 Port Deterministic Ethernet IP Solution with TSN (Time Sensitive Networking)
- Flexible Deterministic Ethernet IP Core with TSN (Time Sensitive Networking)