Multi-Point Hi-Speed OTG Controller

特色

• Applicable to either point-to-point or multi-point USB OTG
• Complies with the USB 2.0 standard for Hi-Speed (480 Mbps) and Full-Speed (12Mbps) functions and with the OTG supplement to the USB 2.0 specification
• May be used with High-, Full-, or LowSpeed USB devices
• Can be used as either host or peripheral in point-to-point OTG
• Supports session request protocol (SRP) and host negotiation protocol (HNP)
• Configurable for up to 15 additional transmit endpoints and up to 15 additional receive endpoints
• Configurable FIFOs with option of dynamic FIFO sizing
• 32-bit AMBA AHB-compatible CPU interface supporting multilayer operations
• UTMI+ Level 3 transceiver interface with optional ULPI link wrapper
• Optional USB 1.1 PHY interface
• Synchronous RAM interface for FIFOs
• Support for external DMA access to FIFOs
• Support for internal DMA access to FIFOs via built-in DMA controller
• Performs all transaction scheduling in hardware
• Standard device requests handled efficiently in software for flexibility
• UTMI+ PHY vendor register option
• Graphical user interface provided for core configuration

可交付内容

• Verilog source code and testbench
• Synthesis script for design compiler
• Reference technology netlist
• Product specification, user guide, and programmer's guide

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