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MPEG-1/2 - Layer I/II Audio Encoder
The MPEG-1/2 – Layer I/II Audio Encoder (CWda74) is an audio IP core for encoding one audio stream in real-time.
This core contains the MPEG-1/2 – Layer I/II encoder software and the Coreworks processor based hardware audio engine platform (CWda1011).
The software is compiled into an image file (.bin) which can be automatically boot-loaded through one of the control interfaces (parallel AMBA APB or serial SPI) and run on the audio engine platform with simple parameters setting.
The program can be configured, controlled and monitored by means of a configuration, control, and status register file, accessed by the control interfaces.
The audio input and output interfaces uses a native parallel interface. Other standard audio interfaces, such as I2S/TDM and SPDIF are also available.
The interface to the external memory can be one of the following: AMBA AXI (for ASICs or Xilinx FPGAs), Avalon (for Altera FPGAs) or MIG (for Xilinx FPGAs).
The CWda1011 platform is an instance of the generic CWdaXYZ audio engine platform. Other platforms are available for a different number of audio channels (from 2 channels, up to 32 channels). Please contact us to select the best solution for your requirements.
This core contains the MPEG-1/2 – Layer I/II encoder software and the Coreworks processor based hardware audio engine platform (CWda1011).
The software is compiled into an image file (.bin) which can be automatically boot-loaded through one of the control interfaces (parallel AMBA APB or serial SPI) and run on the audio engine platform with simple parameters setting.
The program can be configured, controlled and monitored by means of a configuration, control, and status register file, accessed by the control interfaces.
The audio input and output interfaces uses a native parallel interface. Other standard audio interfaces, such as I2S/TDM and SPDIF are also available.
The interface to the external memory can be one of the following: AMBA AXI (for ASICs or Xilinx FPGAs), Avalon (for Altera FPGAs) or MIG (for Xilinx FPGAs).
The CWda1011 platform is an instance of the generic CWdaXYZ audio engine platform. Other platforms are available for a different number of audio channels (from 2 channels, up to 32 channels). Please contact us to select the best solution for your requirements.
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Block Diagram of the MPEG-1/2 - Layer I/II Audio Encoder
Audio IP
- 120 dB SNR, 24-bit stereo audio DAC with cap-less headphone driver, low power mode and ultra low latency capability for headset applications
- Audio I2S-TDM Transceiver
- Audio codec with capacitor-less 106 dB dynamic range ADC and 120 dB SNR DAC with very low latency filters and ultra low power mode
- High performance, energy efficient 3-issue, quad-mac superscalar DSP core for HD Audio applications based on fourth generation ZSP architecture
- Modern, high performance Audio DSP, optimized for far-field noise reduction and Artificial Intelligence speech recognition
- 24bit Audio ADC/24bit Video DAC