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MIPI Testbench
Rambus MIPI Testbench from Rambus emulates a MIPI device enabling end-to-end simulation of a MIPI design.
This includes the follow features:
• Separate versions for CSI-2 Transmit, CSI-2 Receive, DSI Host (Transmit), DSI Peripheral (Receive)
• Logging and display of all MIPI traffic in a user-friendly format
• Provided with an extensive set test scripts
The fast setup and operation of the MIPI Testbench makes it easy for users to quickly and comprehensively perform end-toend simulations of their MIPI design.
The Testbench is fully compliant with CSI and DSI specifications.
The MIPI Testbench is not a full MIPI compliance suite. Contact Rambus for its recommended third-party MIPI Compliance Suite for ASIC validation.
Rambus also provides IP Core customization services.
Contact Rambus for a quote.
This includes the follow features:
• Separate versions for CSI-2 Transmit, CSI-2 Receive, DSI Host (Transmit), DSI Peripheral (Receive)
• Logging and display of all MIPI traffic in a user-friendly format
• Provided with an extensive set test scripts
The fast setup and operation of the MIPI Testbench makes it easy for users to quickly and comprehensively perform end-toend simulations of their MIPI design.
The Testbench is fully compliant with CSI and DSI specifications.
The MIPI Testbench is not a full MIPI compliance suite. Contact Rambus for its recommended third-party MIPI Compliance Suite for ASIC validation.
Rambus also provides IP Core customization services.
Contact Rambus for a quote.
查看 MIPI Testbench 详细介绍：
- 查看 MIPI Testbench 完整数据手册
- 联系 MIPI Testbench 供应商
MIPI IP
- MIPI CSI-2 Controller Core V2
- MIPI D-PHY in TSMC (40nm, 28nm, 16nm, 12nm, 7nm)
- MIPI M-PHY in TSMC (28nm, 16nm, 12nm(
- MIPI CSI-2 Transmitter v 2.1, Compatible with MIPI C-PHY v1.2 & DPHY v2.1.
- MIPI D-PHY / C-PHY Combo IP for TSMC (5nm, 6/7nm, 12/16nm, 22nm, 28nm, 40nm)
- MIPI I3C Controllers - Dual Role Master (70016); APB I3C Slave (70002), Generic I3C Slave