MIPI PLL
The circuit is designed in a modular fashion and desensitized to process variations. This facilitates process migration, and results in a robust design. The MXL-PLL-MIPI-PXL incorporates a Lock Detector, three programmable output dividers, and supports a full-power down mode.
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MIPI IP
- Northwest Logic MIPI Testbench from Rambus
- MIPI D-PHY in TSMC (40nm, 28nm, 16nm, 12nm, 7nm)
- MIPI M-PHY in TSMC (28nm, 16nm, 12nm, 10nm)
- MIPI I3C Controllers - Dual Role Master (70016); APB I3C Slave (70002), Generic I3C Slave
- MIPI D-PHY DSI/CSI Transmitter IP (Silicon proven in TSMC 22ULP)
- MIPI CSI-2 Transmitter v 2.1, Compatible with MIPI C-PHY v1.2 & DPHY v2.1.