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MIPI DSI-2 v2.0 RX/TX FOR COMBO C/DPHY
特色
- Compliant with MIPI DSI-2 v2.0 MIPI D-PHY Standard v3.x, MIPI C-PHY V2.0/2.1
- Up to 3 Gsps per trio using C-PHY. 17Gbps in 3 Trios.
- Up to 2.5 Gbps per data lane of D-PHY (V2.0). 10Gbps in 4 Lanes
- Programmable 1, 2, 3 (C-PHY) or 4 (D-PHY) Data Lane Configuration.
- Forward and Reverse Communication
- Configurable Virtual Channel up to 4
- Operate in continuous and non-continuous clock modes.
- Command and Video Mode are supported.
- Burst and Non-Burst modes are supported.
- Pulse and Event modes supported
- Color Modes: 16, 18, 24 and 36 bpp
- Display Stream Compression (DSC) Supported
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Block Diagram of the MIPI DSI-2 v2.0 RX/TX FOR COMBO C/DPHY
MIPI DSI IP
- MIPI CSI DSI C-PHY IP for TSMC (5nm, 6/7nm, 12/16nm, 22nm, 28nm, 40nm)
- MIPI DSI Receiver Controller v1.3
- MIPI DSI Transmit Controller v1.3
- MIPI CSI DSI Controller - CPHY CSI-2 Transmitter v 2.1, Compatible with MIPI C-PHY v1.2 & DPHY v2.1.
- MIPI D-PHY / C-PHY Combo IP for TSMC (5nm, 6/7nm, 12/16nm, 22nm, 28nm, 40nm)
- MIPI C-PHY/D-PHY Combo IP 4.5Gsps/4.5Gbps in TSMC N5