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MIPI D-PHY Universal IP in UMC 28HPC+
The MXL-DPHY-UNIV-U-28HPC+ is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specification for D-PHY v2.5. The PHY can be configured as a MIPI Master or MIPI Slave supporting camera interface CSI-2 and display interface DSI/DSI-2. The PHY supports mobile, IoT, virtual reality, and automotive applications.
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Block Diagram of the MIPI D-PHY Universal IP in UMC 28HPC+
MIPI M-PHY IP
- MIPI M-PHY G4 Type 1 2Tx2RX in TSMC (16nm, 12nm, N7, N6, N5, N4, N3E)
- MIPI M-PHY - TSMC 40nm
- MIPI M-PHY G4 Designed For TSMC 28nm HPC+
- UFS 4.0 Host Controller compatible with M-PHY 5.0 and UniPro 2.0
- MIPI M-PHY HS-G4 IP (M-PHY v4.1) in TSMC 40G
- UFS 3.0 Host Controller with AES Encryption compatible with M-PHY 4.0 and UniPro 1.8