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MIPI D-PHY TX COMBO LVDS PHY
The Innosilicon MIPI D-PHY TX combo LVDS PHY integrates a D-PHY and a LVDS in a single IP core, which provides a MIPI® high speed data plus low-power low speed transmitter that supports data transfer in the bi-directional mode.
The D-PHY is built in with a standard digital interface to talk to any third-party Host controller. Innosilicon LVDS implements the LVDS TIA/EIA protocol. Normally, Innosilicon LVDS contains five Low-Voltage Differential Signaling (LVDS) line drivers in a single integrated circuit.This enables a seamless implementation allowing interfaces to D-PHY based sensors. The Innosilicon I/O and ESD are also built-in as one in a rectangular footprint for any configuration. It is optimized for High-speed applications with robust timing and small silicon area.
The D-PHY supports the electrical portion of MIPI D-PHY V1.2 standard, covering all transmission modes (ULP/LP/HS). This IP cost-effectively adds MIPI D-PHY capability to any SoC used in communication and consumer electronics field.
The D-PHY is built in with a standard digital interface to talk to any third-party Host controller. Innosilicon LVDS implements the LVDS TIA/EIA protocol. Normally, Innosilicon LVDS contains five Low-Voltage Differential Signaling (LVDS) line drivers in a single integrated circuit.This enables a seamless implementation allowing interfaces to D-PHY based sensors. The Innosilicon I/O and ESD are also built-in as one in a rectangular footprint for any configuration. It is optimized for High-speed applications with robust timing and small silicon area.
The D-PHY supports the electrical portion of MIPI D-PHY V1.2 standard, covering all transmission modes (ULP/LP/HS). This IP cost-effectively adds MIPI D-PHY capability to any SoC used in communication and consumer electronics field.
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