MIPI C-PHY IP for TSMC (5nm, 6/7nm, 12/16nm, 22nm, 28nm, 40nm)
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MIPI D-PHY/sub-LVDS combo Transmitter 1.5G/1.0Gbps 4-Lane
The CL12661K4T1AM2JIP is an ideal means to link Camera Modules or CMOS Image Sensor (CIS) to Host System. The CL12661K4T1AM2JIP is designed to support data rate in excess of maximum 1.5Gbps utilizing sub-LVDS / MIPI-DPHY interface specification. The CL12661K4T1AM2JIP can change Interface type to same PAD for changing mode.
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CAMERA IP
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- Camera capture unit for multi-camera systems
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