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MIPI D-PHY/sub-LVDS/CMOS1.8 combo Transmitter 2.5G/800Mbps 8-Lane
The CL12661M8T1KM2JIP is an ideal means to link Camera Modules or CMOS Image Sensor (CIS) to Host System. The CL12661M8T1KM2JIP is designed to support data rate in excess of maximum 2.5Gbps utilizing sub-LVDS / MIPI-DPHY interface specification. The CL12661M8T1KM2JIP can change Interface type to same PAD for changing mode.
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CAMERA IP
- Very compact (500 LUTs) Camera Sensor Receiver Interface Converting from MIPI CSI-2 to AXI4-Stream Video Standard
- Camera SLVS-EC 3.0 Receiver 10.0Gbps 8-Lane
- Camera SLVS-EC/MIPI D-PHY/sub-LVDS/CMOS1.8 combo Receiver 5.0G/2.5G/1Gbps/166MHz 8-Lane
- IP Camera Front End
- MIPI CSI-2 host/device controllers for high-speed serial interface between image processor and camera sensors
- Camera SLVS-EC 2.0 Receiver 5.0Gbps 8-Lane