NVM Anti-Fuse OTP NeoFuse in UMC (110nm, 80nm, 55nm, 40nm, 28nm, 22nm)
MIPI D-PHY Receiver with PPI
via PPI interface. It supports 4 data lanes, providing up to 10Gbps data rate for MIPI mode, 10Gbps data rate for HiSpi/sub LVDS mode, and supports Serial to Parallel 8 bits mode options. HS(High Speed) and LP(Low
Power) modes are supported by this PHY design, while it can transmit data with 10Mbps per lane in Low Power mode. Auto skew calibration is also supported. A Power-Down mode is specially supported for power saving case.
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