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MIPI D-PHY Receiver in TSMC 28nm HPM
The MXL-PHY-CSI2-RX+ is a high frequency low-power, low-cost, source-synchronous, Physical Layer compliant with the MIPI Alliance Standard for D-PHY.
The IP is configured as a MIPI slave optimized for camera interface applications (CSI2).
The RX+ is a Mixel proprietary D-PHY configuration that enables Mixel's customers to achieve full-speed testability while minimizing power and area.
The IP is configured as a MIPI slave optimized for camera interface applications (CSI2).
The RX+ is a Mixel proprietary D-PHY configuration that enables Mixel's customers to achieve full-speed testability while minimizing power and area.
特色
- Consists of 1 Clock lane and 2 Data lanes
- Complies with MIPI Standard 1.1 for D-PHY
- Supports both high speed and lowpower modes
- 80 Mbps to 1.5Gbps data rate in high speed mode
- 20 Mbps data rate in low-power mode
- High Speed Deserializers included
- Low power dissipation
- Proprietary features supporting full-speed testability with reduced power and area
可交付内容
- Datasheet
- GDSII and LVS Netlist
- Integration Guideline
- Timing Model and Behavioral Model
- RTL
- One year support
应用
- Automotive
- IoT
- Mobile
- VR/AR/XR
- Consumer Electronics
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