MIPI C-PHY v1.2 D-PHY v2.1 TX 3 trios/4 Lanes in TSMC (16nm, N7, N5A)
MIPI D-PHY Combo LVDS CSI-2 RX IP
Innosilicon CSI-2 Receiver operates as a receiver of a CSI-2 link, which consists of an Innosilicon D-PHY, LVDS, and an Innosilicon CSI-2 controller.
The Innosilicon D-PHY is used for the data transmission from a CSI-2 compliant camera sensor. In D-PHY, the link includes a High-Speed signaling for fast-data traffic and a low-power signaling mode for control purposes. Error information is generated for application layer to do further operation.
Innosilicon LVDS implements the LVDS TIA/EIA protocol. Normally, Innosilicon LVDS contains five Low-Voltage Differential Signaling (LVDS) line drivers in a single integrated circuit.
The Innosilicon MIPI CSI-2 Receiver Controller works as a protocol layer between application layer and physical layer. It implements all three layers defined by CSI-2 Specifications, and aims to reconstruct the data stream from the D-PHY.
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