MIPI C-PHY v1.2 D-PHY v2.1 TX 3 trios/4 Lanes in TSMC (16nm, N7, N5A)
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MIPI D-PHY 4-Lane CSI2-TX (Transmitter) in TowerJazz 65nm
The MXL-DPHY-0p2G-CSI-2-TX-T-180BCD is a high-frequency low-power, low-cost, source-synchronous, Physical Layer supporting the MIPI Alliance Standard for D-PHY. The IP is configured as a MIPI master optimized for camera interface applications (CSI-2). The High-Speed signals have a low voltage swing, while Low-Power signals have large swing. High-Speed functions are used for High-Speed data traffic while low power functions are mostly used for control.
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Block Diagram of the MIPI D-PHY 4-Lane CSI2-TX (Transmitter) in TowerJazz 65nm
DPHY IP
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