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MIPI CSI-2 Transmitter
The MIPI CSI-2 Transmitter IP core is compliant to CS1-2 MIPI specification for Camera Serial Interface Version 1.00. It provides an interface between a digital imaging module such as a host processor or peripheral, and a physical layer device such as a D-PHY. The IP core has an AHB or PCI interface that allows a processor to send data with JPEG, MPEG, or other format to the CSI-2 Transmitter. The MIPI CSI- 2 Transmitter and the D-PHY IP cores provide a complete solution for mobile digital camera applications with data transfer rate up to 4 Gbit/s
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Block Diagram of the MIPI CSI-2 Tansmitter v 1.3, C-PHY compatible
CSI Camera IP
- MIPI CSI DSI Controller - CPHY CSI-2 Transmitter v 2.1, Compatible with MIPI C-PHY v1.2 & DPHY v2.1.
- CSI2 TX; Camera Serial Interface, MIPI Compliant
- CSI2 RX; Camera Serial Interface, MIPI Compliant
- Camera sub-LVDS/mini-LVDS/LVDS/HiSPi(SLVS-400, HiVCM)/MIPI-DPHY/CMOS 6-7mode Combo-Receiver 1.5Gbps
- MIPI CSI DSI C-PHY IP for TSMC (5nm, 6/7nm, 12/16nm, 22nm, 28nm, 40nm)
- MIPI CSI-2 controller Receiver v 2.1, Compatible with MIPI C-PHY v1.2 & DPHY v2.1.