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MIPI Compliant M-PHY
The MIPI M-PHY is a high-frequency low-power, low-cost, Physical Layer IP compliant with the MIPI Alliance Standard for M-PHY. The IP can be used as a physical layer for many applications, including interfaces for display, camera, audio, video, memory, power management and Baseband to RFIC.
It supports the following standards: DigRF v4, CSI-3, DSI-2, Uniport-M (UniPro1.5) and JC-64.1 UFS.
By using efficient BURST mode operation with scalable speeds, significant power savings can be obtained.
Selection of signal slew rate and amplitude allows reduction of EMI/RFI, while maintaining low bit error rates.
It supports the following standards: DigRF v4, CSI-3, DSI-2, Uniport-M (UniPro1.5) and JC-64.1 UFS.
By using efficient BURST mode operation with scalable speeds, significant power savings can be obtained.
Selection of signal slew rate and amplitude allows reduction of EMI/RFI, while maintaining low bit error rates.
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MIPI M-PHY IP
- MIPI M-PHY in TSMC (28nm, 16nm, 12nm, 10nm)
- UFS 2.1 Host Controller compatible with M-PHY 3.1 and UniPro 1.6
- MIPI M-PHY v3.1 IP in TSMC(12/16nm, 28nm, 40nm, and 55nm)
- UFS 3.0 Host Controller compatible with M-PHY 4.0 and UniPro 1.8
- MIPI M-PHY G4 Designed For TSMC 28nm HPC+
- MIPI D-PHY Receiver in TSMC 28nm HPM