ICE-IP-358 High-speed XTS-GCM Multi Stream Inline Cipher Engine, DPA resistant
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MIPI C-PHY/D-PHY Combo DSI RX+ IP (4.5Gsps/trio, 6.5Gbps/lane) in TSMC 16FFC
The MXL-CD-PHY-DSIRX+-T-16FFC is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specification for D-PHY v3.5 and C-PHY v2.1. The PHY can be configured as a MIPI Secondary supporting display interface DSI/DSI-2. The PHY supports mobile, IoT, virtual reality, and automotive applications. The DSI RX+ is a Mixel proprietary configuration that is optimized to support full-speed production and in-system testing while minimizing area and leakage power.
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Block Diagram of the MIPI C-PHY/D-PHY Combo DSI RX+ IP (4.5Gsps/trio, 6.5Gbps/lane) in TSMC 16FFC
DPHY IP
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