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MIPI C/D-PHY RX
The Innosilicon MIPI C/D-PHY RX provides D-PHY and C-PHY in a single IP core. It integrates a compatible PHY that supports high speed data receiver, plus a MIPI® low-power low speed receiver that supports data transfer in the bi-directional mode.
The D-PHY is built in with a standard PPI digital interface to talk to any third-party Host controller.
The C-PHY was designed to coexist on the same IC pins as D-PHY so that dual-mode devices could be developed with low power signaling similar to D-PHY.
This enables a seamless implementation allowing interface to D-PHY based sensors or C-PHY based sensors. The Innosilicon I/O and ESD are also built-in as one in a rectangular footprint. It is optimized for high speed applications with robust timing and small silicon area.
The D-PHY and C-PHY support the electrical portion of MIPI D-PHY V1.2 standard and C-PHY V1.1 standard, covering all transmission modes (ULP/LP/HS). This IP cost-effectively adds MIPI D-PHY V1.2 and MIPI C-PHY V1.1 capability to any SoC used in communication and consumer electronics field.
The D-PHY is built in with a standard PPI digital interface to talk to any third-party Host controller.
The C-PHY was designed to coexist on the same IC pins as D-PHY so that dual-mode devices could be developed with low power signaling similar to D-PHY.
This enables a seamless implementation allowing interface to D-PHY based sensors or C-PHY based sensors. The Innosilicon I/O and ESD are also built-in as one in a rectangular footprint. It is optimized for high speed applications with robust timing and small silicon area.
The D-PHY and C-PHY support the electrical portion of MIPI D-PHY V1.2 standard and C-PHY V1.1 standard, covering all transmission modes (ULP/LP/HS). This IP cost-effectively adds MIPI D-PHY V1.2 and MIPI C-PHY V1.1 capability to any SoC used in communication and consumer electronics field.
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