TSMC 5nm (N5) 1.2V/1.8V Failsafe GPIO Libraries, multiple metalstacks
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MIPI C/D COMBO TX PHY, 5nm
The MIPI C/D combo PHY Tx IP is compliant with the Display Serial Interface (DSI) with D-PHY signaling up to 4.5GHz and C-PHY operating at a symbol rate ranging up to 3.5Gsps. This combo IP is designed for extreme low power and easy integration into any System-On-Chip (SOC).
Optimized for high performance, low power and small area, the InPsytech MIPI C/D Tx combo PHY can be delivered in forms of one to four lanes/trios and configured into different combinations of D- and/or C-PHY transmitters; for example, a 3-trio C/D combo Tx IP can be configured into a 3-trio C-PHY or a 4-lane D-PHY. This IP is provided as a hard macro PHY that is primarily delivered as GDSII.
For further information please contact InPsytech sales representative at sales@inpsytech.com.
Optimized for high performance, low power and small area, the InPsytech MIPI C/D Tx combo PHY can be delivered in forms of one to four lanes/trios and configured into different combinations of D- and/or C-PHY transmitters; for example, a 3-trio C/D combo Tx IP can be configured into a 3-trio C-PHY or a 4-lane D-PHY. This IP is provided as a hard macro PHY that is primarily delivered as GDSII.
For further information please contact InPsytech sales representative at sales@inpsytech.com.
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Block Diagram of the MIPI C/D COMBO TX PHY, 5nm
