Original Lossless codec IP core - Full HD 30fps@126MHz (1Sample/clk)
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Mil-Std-1553B/AS15531 Interface
The GR1553B core implements the MIL-STD-1553B (Notice 2) data bus protocol, with ability to serve as Bus Controller (BC), Remote Terminal (RT) or Bus Monitor (BM).
The core is connected to the MIL-STD-1553B bus via a dual transceiver interface (txP/N/en, rxP/N/en). On the system side, the core connects to the AMBA bus as an AHB master for DMA transfers and an APB slave for register access. The core uses a separate 20 MHz clock for the MIL-STD-1553B codec, and runs at any AMBA clock frequency from 10 MHz and upwards.
The core is connected to the MIL-STD-1553B bus via a dual transceiver interface (txP/N/en, rxP/N/en). On the system side, the core connects to the AMBA bus as an AHB master for DMA transfers and an APB slave for register access. The core uses a separate 20 MHz clock for the MIL-STD-1553B codec, and runs at any AMBA clock frequency from 10 MHz and upwards.
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