MIPI C-PHY v1.0 D-PHY v1.2 RX 3 trios/4 Lanes in TSMC (16nm, 12nm, N7, N6, N5)
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Metal programmable ROM compiler - Memory optimized for low power - Dual Voltage - compiler range up to 1024 k
Metal programmable ROM compiler - TSMC 130 nm G - Non volatile memory optimized for low power - Dual Voltage - compiler range up to 1024 k
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ROM IP
- Parameterizable ROM Built In Self Test Controller
- Cryogenic Contact Programmable ROM qualified down to 4K operating temperature
- Metal programmable ROM compiler - Memory optimized for low power and high density - Dual Voltage - compiler range up to 1024 k
- Metal programmable ROM compiler - Memory optimized for low power and high density - compiler range up to 1024 k
- Metal programmable ROM compiler - Memory optimized for low power and high density - Dual Voltage - compiler range up to 1024 k
- Metal programmable ROM compiler - Memory optimized for low power and high density - Dual Voltage - compiler range up to 1024 k