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LVDS serdes 28:4 channel compression TX 20-170Mhz
LVDS serdes 28:4 channel compression TX 140-1190 Mbs x4
FPD-LINK Transmitter 24-bit color 20-170Mhz
This FPD Link Transmitter Macro is based on National Semiconductor openLDI specification v0.95 dated May 13th 1999 that allow the transfer of digital display data between a display source and a display device.
This transmitter converts 4 LVDS, (low voltage differential signaling) data streams, into up to 24 bits CMOS data plus 4 control signals (VSYNC, HSYNC, DE, and 1 user-defined signals).
At a maximum pixel rate of 170Mhz, LVDS data line speed is 1190Mbps, providing a total maximum bandwidth of 4.76Gb/s
FPD-LINK Transmitter 24-bit color 20-170Mhz
This FPD Link Transmitter Macro is based on National Semiconductor openLDI specification v0.95 dated May 13th 1999 that allow the transfer of digital display data between a display source and a display device.
This transmitter converts 4 LVDS, (low voltage differential signaling) data streams, into up to 24 bits CMOS data plus 4 control signals (VSYNC, HSYNC, DE, and 1 user-defined signals).
At a maximum pixel rate of 170Mhz, LVDS data line speed is 1190Mbps, providing a total maximum bandwidth of 4.76Gb/s
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LVDS IP
- Bi-Directional LVDS with LVCMOS
- TSMC 3nm (N3E) 1.5V LVDS
- TSMC 3nm (N3E) 1.2V LVDS Tx/Rx with 1.8V BGR
- Display LVDS/MIPI D-PHY/sub-LVDS combo Transmitter 1.0G/2.5G/1.0Gbps 10-Lane
- LVDS IO handling data rate up to 50Mbps with maximum loading 60pF
- Display LVDS single link/dual link Transmitter 1.12Gbps 8-Lane