MIPI C-PHY v1.2 D-PHY v2.1 TX 3 trios/4 Lanes in TSMC (16nm, N7, N5A)
LVDS Receiver
特色
- Wide frequency range:
- Input: 20 – 150 MHz
- Output: 20 – 150 MHz
- Power-Down Mode
- Supports VGA, SVGA, XGA, SXGA, SXGA+ and QXGA
- Up to 10.5 Gbit/s bandwidth
- PLL requires no external components
- 8- or 10-bit mode
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