LVDS Receiver 1250Mb/s, 800Mhz clock
This LVDS receiver is a very fast comparator that can recover very small differential signaling with a very wide common mode range, allowing a proper recovery of LVDS signals and its use with many other specification.
Two separate library are available: inline (VT18LVDSR-I) and staggered I/O configuration (VT18LVDSR-S).
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LVDS IP
- TSMC GF LVDS Tx/Rx with optional CMOS I/O
- TSMC FPD-Link / OpenLDI / LVDS forwarded clock SERDES Link
- TSMC 3nm (N3E) 1.5V LVDS
- TSMC 3nm (N3E) 1.2V LVDS Tx/Rx with 1.8V BGR
- Display LVDS/MIPI D-PHY/sub-LVDS combo Transmitter 1.0G/2.5G/1.0Gbps 10-Lane
- LVDS IO handling data rate up to 50Mbps with maximum loading 60pF