LVDS IO Pad Set
This 22nm library is available in a staggered CUP wire bond implementation with a flip chip option.
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ESD IP
- on-chip ESD protection
- IO & ESD solutions supporting GPIO, I2C,RGMII, SD, LVDS, HDMI & analog/RF across multiple technology nodes
- High-voltage solutions in baseline TSMC and GlobalFoundries technology
- 5V ESD Clamp in GlobalFoundries 180nm LPe
- 5.5V ESD Clamp Cell and 7V HV ESD Protection
- 6.5V ESD Clamp in 180nm Technology