Low Power/Ultra Low Power Pseudo 2 Ports SRAM Compiler with Row/Column Redundancy Option, supports process GP/LP/LPEF/ULP/ULPEF
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memory compiler IP
- Ultra High-Speed Cache Memory Compiler
- TSMC CLN12FFC Ternary Content Addressable Memory Compiler
- TSMC CLN5FF Ternary Content Addressable Memory Compiler with Column Redundancy
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- Metal programmable ROM compiler - Memory optimized for low power and high density - Dual Voltage - compiler range up to 1024 k
- Metal programmable ROM compiler - Memory optimized for low power and high density - compiler range up to 1024 k