Display LVDS/MIPI D-PHY/sub-LVDS combo Transmitter 1.0G/2.5G/1.0Gbps 10-Lane
12-Bit Low Power Successive-Approximation ADC - 37.5 MS/s - GlobalFoundries 40nm
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Block Diagram of the Low Power Successive-Approximation ADC 37.5 MS/s 12-Bit
12-Bit Successive Approximation ADC IP
- This analog-to-digital converter (ADC) uses successive approximation register (SAR) architecture to achieve 12-bit resolution.
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- Low Power Successive-Approximation ADC 12.5 MS/s 12-Bit
