You are here:
Linear Regulator IP, UMC 0.18um G2 process
Input 2.7V~3.6V, Output=1.8V,Loading 50mA Regulator, UMC 0.18um GII 1.8V/3.3V Process
查看 Linear Regulator IP, UMC 0.18um G2 process 详细介绍：
- 查看 Linear Regulator IP, UMC 0.18um G2 process 完整数据手册
- 联系 Linear Regulator IP, UMC 0.18um G2 process 供应商
Power IP IP
- Multi-Protocol Crypto Packet Engine, Low Power, Bus Attached
- Low-Latency SerDes PMA - 10GbE, 25GbE
- NPU IP family for generative and classic AI with highest power efficiency, scalable and future proof
- PCIe Gen 6 SERDES IP - supports up to 112G LR ethernet with low power and latency
- 56G Serdes in 7nm bundled with PCie Gen 5 controller IP
- Complete USB Type-C Power Delivery PHY, RTL, and Software