The voltage regulator consists of a differential amplifier which compares reference voltage with voltage from a feedback divider. It adjusts the impedance of a pass PMOS transistor for stabilization of output voltage at a set level. The output voltage adjustment is defined by the digital code OV<1:0>. It is able to change a feedback divider transfer ratio in range of 0.6 / 0.7 / 0.8 / 0.9.
The block is fabricated on TSMC SiGe BiCMOS 0.18 um technology.
- TSMC BiCMOS SiGe 180 nm
- Low drop out
- Low current consumption
- Output voltage digital adjustment
- upported foundries: TSMC, UMC, Global Foundries, SMIC, iHP, AMS, Vanguard, SilTerra
- Schematic or NetList
- Abstract model (.lef and .lib files)
- Layout view (optional)
- Behavioral model (Verilog)
- Extracted view (optional)
- DRC, LVS, antenna report
- Test bench with saved configurations (optional)
- Supply voltage sensitive circuits